Switching voltage regulators are widely used in modern electronic systems for a variety of applications such as computing (server and mobile) and POLs (Point-of-Load Systems) for telecommunications because of their high efficiency and small amount of area/volume consumed by such converters. Widely accepted switching voltage regulator topologies include buck, boost, buck-boost, forward, flyback, half-bridge, full-bridge, and SEPIC topologies. Multiphase buck converters are particularly well suited for providing high current at low voltages needed by high-performance integrated circuits such as microprocessors, graphics processors, and network processors. Buck converters are implemented with active components such as a pulse width modulation (PWM) controller IC (integrated circuit), driver circuitry, one or more phases including power MOSFETs (metal-oxide-semiconductor field-effect transistors), and passive components such as inductors, transformers or coupled inductors, capacitors, and resistors. Multiple phases (power stages) can be connected in parallel to the load through respective inductors to meet high output current requirements.
Power supply requirements for electronic systems are complex, with many different power supply rails generated for different voltage, current and start-up requirements in typical multi-component boards. Point-of-Load (PoL) switching voltage regulators efficiently distribute power, allowing voltage supply generation close to the load. Digital voltage regulators are becoming increasingly popular as POL switching voltage regulators, offering flexibility to implement a diverse set of output requirements, with good performance and a rich set of features. Digital switching voltage regulators are often controlled via a digital host interface. The protocol for the digital host interface is subject to change e.g. by changing functionality, extending the command set or changing the protocol revision. Conventional digital switching voltage regulators typically use a hard-coded RTL (register-transfer level) implementation of the digital host interface. With such hard-coded designs, a full mask re-design is needed to adapt to specification changes. This in turn increases overall system cost and the time required to fabricate (physically produce) the new design.